Reflow soldering of electronic components to substrates typically employs the use of a heated oven or platen. Specific temperature profiles are required to control and properly reflow the solder to achieve sound, uniform solder joints. Those profiles must be closely controlled and maintained in order to accommodate variations in thermal mass of the substrate and components.
If the profile of the oven or platen changes, the component mass or the mass of a substrate changes, the solderability of the component or the substrate changes, the soldering process may yield unacceptable results. To avoid having to rework or scrap product, the soldering process is periodically monitored by visual inspection. Inspection attempts to control the soldering process by periodically sampling the substrates and visually inspecting the soldered connections. The visual inspection step is usually performed after the soldering process is complete and checks for solder bridges, solder balls and incomplete solder connections which may result from insufficient solder or an unsolderable surface. This method has limited use because it samples only a small percentage of assemblies, does not provide individual substrate information and requires an extra production step.
Other solder joint verification methods employing automated optical inspection equipment attempt to control the soldering process by inspecting individual solder connections. This method detects soldering defects such as porosity, solder bridges, solder balls and solder intermittents or opens. Automated visual inspection yields data on every solder joint and every substrate without additional production steps. However, it only measures the amount and location of the solder and cannot determine whether the solder has properly reflowed or formed a metallurgical interconnection.
Other means of solder joint inspection have been proposed in the literature. For example, so solder joint verification method employing automated inspection equipment is disclosed by Thome in U.S. Pat. No. 4,944,447 entitled "Bonding Verification Process Incorporating Test Patterns." This method utilizes test patterns strategically placed on the substrate and covered with solder paste prior to reflow. By positioning the test patterns near the component solder connections, it is assumed that the test patterns will mimic the quality of the component solder connection.
After reflowing, the test patterns may be visually inspected to verify that the solder has properly reflowed to the test pattern. This method provides generic information for the soldering performance of the substrate, however it fails to provide data for individual solder connections because the test patterns are not the actual interconnection between the component and the substrate, and the mean or generic performance is not reflective of all individuals. In addition, this method does not provide information on solder joints that are under components or otherwise hidden from view, and may not form a proper solder joint due to any one of the aforementioned reasons. Solder surfaces which are obscured to the prying eye, for example those underneath components such as a pad array chip carrier or semiconductor device, are unable to be inspected visually. It is impossible, without destructive analysis, to determine whether the solder joint on a pad array chip carrier has wetted to the substrate, perhaps leaving an open or intermittent connection. Inspection of these hidden solder joints by conventional x-ray methods only verifies the presence or absence of solder material and cannot indicate whether a proper solder interconnection has formed between the component and the substrate.
Referring to FIG. 1A, pad array chip carrier solder interconnections as practiced in the prior art employ substantially circular solder pads 12 on both the substrate 10 and the component 15. After the solder is reflowed and wetted to the substrate solder pads 12 and the component solder pads 16, a proper solder joint 18 is formed. If the solder fails to wet to either the solder pad of the component or the solder pad of the substrate because of surface contamination, improper solder mass, or improper solder fluxing, the resulting solder interconnection 19 does not provide an electrical connection between the component 15 and the substrate 10. Detection of this occurrence with conventional inspection techniques is impossible, and x-ray analysis of the solder joint is required. An x-ray image of the soldered connection in FIG. 1B shows that there is no difference between the improper solder connection 19 and the proper solder connections 18.
Due to the extremely high number of solder joints and the extremely high yields required in processes utilizing pad array chip carriers, the desire to effectively analyze the solder joint without destroying the assembly becomes of high interest. Present methods of controlling solder joint reflow profiles by inspecting the metallurgical joint are clearly inadequate for processes requiring extremely high yields. Statistical sampling of a small fraction of solder joints can never provide the information required to achieve extremely high-yielding solder interconnections, for example solder joint defect levels less than one hundred parts per million (ppm). In addition, all present inspection methods fail to accommodate solder joints under components and do not address the problem of inspection of leadless pad array chip carriers. A need exists for a solder inspection and verification method that will be an integral part of the soldering process, does not require additional production steps, inspects and produces test results for every interconnection on the substrate, verifies proper solder reflow and verifies that each individual interconnection is properly made.